Transactions on Very Large Scale Integration

Transactions on Very Large Scale Integration ( Vlsi

Ieee Transactions on Core Vlsi Ieee Transactions on Image Processing Ieee Transactions on Digital System Design Ieee Transactions on Testing Ieee Transactions on Communication Ieee Transactions on Low Power Vlsi

Investigating the Effects of Large Block Transactions and Owner-ship Nature on Non-Financial Disclosure

Having adequate, sufficient and timely information and data is very important for investors' decision making. Processing information and allocating the asset are two fundamental tasks in the securities market and the stock price is more likely to have the nature of disclosure, information effectiveness and asset allocation efficiency. Thus, in this research, the effects of large block transacti...

On the Effect of Floorplanning on the Yield of Large Area Integrated Circuits - Very Large Scale Integration (VLSI) Systems, IEEE Transactions on

Until recently, VLSI designers rarely considered yield issues when selecting a floorplan for a newly designed chip. This paper demonstrates that for large area VLSI chips, especially those that incorporate some fault tolerance, changes in the floorplan can affect the projected yield. We study several general floorplan structures, make some specific recommendations, and apply them to actual VLSI...

IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION ( VLSI ) SYSTEMS 1 Synthesis of Pipelined DSP

1 Synthesis of Pipelined DSP Accelerators with Dynamic Scheduling P. Schaumont, B. Vanthournout, I. Bolsens, H. De Man, Fellow, IEEE Abstract|To construct complete systems on silicon, application speci c DSP accelerators are needed to speed up the execution of high throughput DSP algorithms. In this paper, a methodology is presented to synthesize high throughput DSP functions into accelerator p...

Investigation into micropipeline latch design styles - Very Large Scale Integration (VLSI) Systems, IEEE Transactions on

receiver AbstractAn asynchronous implementation of the ARM microprocessor has been designed and fabricated based on Sutherland’s Micropipeline approach. Reviews of this work have shown that considerable performance improvement may be possible in a number of key design areas. This paper assesses the effects of different design styles on the micropipeline latch structures used. The original desig...